Pac Tech - Wafer Bumping, Based on Electroless Nickel Plating, and Laser Wafer BondingPac Tech GmbH, founded in 1995, is the world's leading wafer bumping and packaging subcontractor based on electroless Ni metallization. The company focuses on subcontractor bumping and packaging based on electroless Ni metallization. A second business unit of Pac Tech is special equipment for laser bonding and bumping. Since its inception, Pac Tech has received 20 patents for products developed in areas relating to wafer bumping, flip-chip, chip-scale packaging and laser bonding technologies. Pac Tech has formed alliances with companies in the US, Europe and Asia for licensing, equipment sales and contract wafer bumping services. FLIP CHIP WAFER BUMPING PROCESSPac Tech offers subcontractor wafer bumping for flip-chip and CSP (Chip Scale Package) technology. The flip-chip technology has an increasing market for flip-chip-in-package and flip-chip-on-board applications. European requirements focus on smart cards, smart labels and automotive microelectronic products. The availability of bumped dies at a reasonable cost is essential for all flip-chip applications. Pac Tech's wafer bumping service concentrates on a low-cost electroless bumping process on wafer level, based on Ni/Au as an under bump metallization and solder application by stencil printing or solder ball bumping. This bumping process allows a significant cost reduction in comparison to electroplating. The Ni/Au-bumps are applied for both soldering and adhesive joining flip-chip interconnections. The process meets the demanding cost targets in smart card and smart label applications. This wafer bumping process also meets the high reliability requirements for automotive microelectronic products and flip-chip-in-package (e.g. CSP). CLEAN ROOM FACILITY FOR WAFER BUMPINGIn 1997, Pac Tech started the operation from its new permanent headquarters, located in Nauen, 30km west of Berlin. The clean room facility for subcontractor wafer bumping at Nauen has a capacity of 100,000 wafers per year. Pac Tech has an additional demonstration centre for its technology and equipment in the central area of Berlin. In 2002, Pac Tech USA Packaging Technologies Inc., a wholly owned subsidiary of Pac Tech GmbH, opened its new manufacturing site in Silicon Valley, CA. This facility, mainly built for subcontractor bumping for the American market, has a volume wafer bumping capacity of 600,000 wafers per year and is capable of handling wafers of up to 300mm.
Pac Tech GmbH
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![]() Pac Tech GmbH is the world's leading wafer bumping and packaging subcontractor based on electroless nickel plating. | ||
![]() Pac Tech offers subcontractor wafer bumping for flip-chip and CSP (Chip Scale Package) technology. | |||
![]() Pac Tech's wafer bumping service concentrates on a low-cost electroless bumping process on wafer level, based on Ni/Au as an under bump metallization and solder application by stencil printing or solder ball bumping. |
