IMEC 45nm Node

IMEC’s 300mm cleanroom is researching processes and device architectures for the sub 45nm mode, with particular focus on ITRS-related issues. IMEC – one of Europe’s leading independent microelectronics R&D centres – began construction of its new 2,200m² research fab in Leuven (Belgium) in February 2003. The fab was completed in 2004, and ramped up mid 2005.

The initiative involves an €84 million investment, €37.184 million of which has been granted by local government. This was based on 2002 detailed engineering study and positive signals from the industry and local government. The fab is located next to IMEC’s existing buildings for easy information exchange and access to existing staff, facilities, and infrastructure and metrology tools.

ADVANCED PROCESS AND POST-SILICON RESEARCH

The introduction of 300mm wafers and continually more advanced process nodes is increasing both in complexity and cost of process research. The very few companies that can afford a full process research facility run the risk that these become outdated as industry accelerates the introduction of technology nodes. Progress could therefore slow because of a lack of fundamental understanding of critical technology aspects. Organizations like IMEC help spread the risk by sharing its research facilities with major IC manufacturing partners.

The research platform is demonstrating novel device architectures and research process steps and modules. The advanced process research runs two to three technology nodes ahead of manufacturing. It has been designed for flexibility, with ultra-short cycle time. The 300mm lab also freed space in IMEC’s 200mm cleanroom for nanotechnology research, which is important in preparation for the post-silicon era and will have applications in spin-offs and even new industries. Nanotechnology aims to control properties at atomic or molecular level or to realize components with critical dimensions below 100nm.

RESEARCH PROGRAMS FOLLOW ITRS

IMEC sets up research programs focusing on the most important issues identified by the International Technology Roadmap for Semiconductors for the sub 45nm node. This is at least two generations ahead of current mainstream manufacturing.

The fab was built around the world’s most advanced lithography clusters, including 193nm immersion and EUV. The focus is on lithography, new materials, advanced devices and innovative interconnect schemes. The programs are open for semiconductor companies and materials/equipment suppliers worldwide.

SCALING CMOS TRANSISTORS

One of IMEC’s major research themes is the “ultimate scaling of CMOS transistors”, a program that aims to explore CMOS device architectures offering better scaling properties than those of traditional bulk devices for the 45nm generation and beyond.

The program is built on three pillars: simulation, materials characterization and device structures. The last of these comprises work packages on fully-depleted silicon-on-insulator FD-SOI, FinFET-type devices and high-mobility Si/SiGe CMOS devices.

NON-PROFIT ORGANIZATION

IMEC was founded in 1984 as a non-profit organization with delegates from industry, Flemish universities and the Flemish Government. The company has a staff of over 1,250 employees including over 380 project staff from other companies and temporary guest researchers. In 2001 IMEC’s self-generated income rose by 22% to €91.1 million. Today, IMEC generates 76% of its total budget, the remaining 24% being funded by the Flemish community.

Existing infrastructure:

• 4,800m² ultra-clean processing area
• 1,750m² class 1 silicon pilot line (8in / 200mm Si wafers)
• 6,710m² computer room and utilities
• 16,400m² offices and supporting laboratory space
• ISO 9001 qualification

Existing pilot lines:

• 200mm silicon pilot line
• Solar cell pilot line
• MCM-D pilot line

CONTRACTORS

German facility management service provider, M+W Zander (part of Jenoptik) won the €70 million contract to build the new site, together with an office block and a technologies building. As general contractor, the company was responsible for planning, design and construction work.